Paper Number & Title: 159.233 Computer Architecture

Points Value: 12.5 Semester: 1 and 2

Campus: AL Mode: I

Paper Coordinator: Dr Martin Johnson

Information and Mathematical Sciences - Albany
IIMS 3.24; Phone: 4140800 ext 43142; Email: M.J.Johnson@massey.ac.nz
Web Site: http://cs-alb-pc3.massey.ac.nz/

Aim:

This is an enlightenment course about electronic hardware aimed at those who generally concentrate on the software aspects of computers.
Topics covered are basic digital components and circuits, design tools such as Algorithmic State Machines, simulators, microprocessor architecture and assembly language programming.

Software packages used: LOG simulator, qemu, Gnu Assembler

Calender Prescription:

Digital logic. Architecture. Processor organisation, analysis and design. Assembler programming.

Learning Outcomes:

On successful completion of this course the student should be able to:
1. Know the symbols and operation of the digital logic gates.
2. Understand Boolean algebra and apply it to digital circuits.
3. Simulate and demonstrate the operation of a digital circuit.
4. Understand the design process for Algorithmic State Machines ASMs.
5. Design and simulate a digital circuit using ASMs.
6. Know the physical characteristics of some different computer architectures.
7. Design and demonstrate a computer architecture using a hardware simulator.
8. Know the architecture of a microcomputer including timers, interrupts and Input/output.
9. Design and demonstrate an assembly language program for a microcomputer.

Prerequisites:

159.101 Programming Fundamentals
159.102 Computer Science Fundamentals.

Assessments:

LOG ALU Simulation Wk 6 10%
Microcode Assignment Wk 9 15%
Assembler Assignment Wk12 15%
Final examination (3 hours) 60%

Learning Programme and Schedule:

Week

Topics

1

Digital logic and Hardware Realisation

2

Combinational logic, Flipflops, Memory devices

3

Shift Registers, Algorithmic State Machines

4

The Pico Computer - Architecture & Control

5

ALU Construction: Instruction design & Addressing modes:

6

Microprogramming: Architecture, Microcode

7

The ARM Microprocessor, Architecture, Programming.

8

The ARM Simulator, Addressing and Instruction modes

9

Subroutines, Timers, Input/Output

10

Interrupts and further examples

11

Pipelining, single unintelligent, multiple stages

12

Data Hazards Identification, Compensation, Elimination

13

Review of Course

14

Study Break/Final Examination

Additional reference: Computer Org & Design, Patterson & Hennessy

Rough Lecture Outline:

Wk

Topic

Contents

1

Digital logic

logic levels, transistors, gates, symbols, truth tables, Boolean algebra
Hardware realisation: full adder, decoder, De Morgan's law

2

Combinatorial devices

multiplexor, demux
Flipflops: RS, JK, D, edge/level, delays & glitches, Buses, Tri-state
Memory: write to, read from, address lines, chip select

3

MSI

Shift registers, counters – asynch/synch, up, up/down
ALU Construction: Multiplexed Functions,
ASMs: general explanation
controlling next state – mux/decoder
further examples

4

Pico computer

Architecture & component design
Controller, instruction set
Controller design – ASM

5

ALU Construction

Carry look ahead, Booth's algorithm
Instruction design & Addressing modes:
Fetch/Execute cycle, 5 Addr machines to 0 Addr machines
RISC processors

6

Microprogramming

Architecture, Microcode, Horiz v Vertical structure

7

ARM Introduction

Intro to ARM architecture and instruction set.
Assembly language & examples

8

ARM Assembler

Simulator
Pseudo opcodes & examples
Address modes

9

ARM Examples

Instructions & examples
Subroutines

10

ARM I/O

Timers/Input/Output & examples
Interrupts & examples

11

Pipelining

Single unintelligent, Multiple stages

12

Data Hazards

Identification, Compensation, Elimination, Compilers

13

Revision