Microprogramming


The Pico-computer uses hardware to implement its controller.


Combinations of status lines are used to create the next state of the ASM, and multiplexors choose between them given the current state.


The mux’s are performing a ‘table-lookup’

- a job that could just as easily be performed by a ROM.


- The Microprogrammed approach.


Benefits:


If the instruction set needs to be altered, or corrections made, it is a lot easier to change a ROM, than to change or add to the combinatorial logic of the hardwired approach.


A processor can be made to look like, ‘emulate’, another processor, by changing the micro-code, an instruction set of another processor can be implemented (as long as the architecture is compatible).


Extra instructions can be implemented depending on the type of program the processor is executing.


If the program is heavily maths based, we could implement one instruction that performs a Fast Fourier Transform on a set of numbers.


If its text based, we could implement a ‘strcpy’ instruction that performs a block move of data.


In both these instances we are only invoking 1 instruction instead of many. So the total cycle time will be reduced because of the smaller number of instruction fetches. (Data fetches and ALU operations will be the same)


Micro-program controller



There is no longer an instr register. The µ-controller loads the opcode from the Bus when necessary into its own program counter.


The µ-program counter is reset to zero on power up.

µ-addr - initially points to address 0 of µ-ROM.


µ-ROM contains a sequence of data bytes.

These data bytes appear as output and control lines:


processor control lines

condition select

next µ-addr

opcode/(next µ-addr)

The µ-PC is fairly complex:



The data stored in the counter can be either:


incremented if LD/(INC) is False

or:

loaded from in if LD/(INC) is True



If LD is True, then the PC is either:


next µ-addr coming from ROM

or:

the next opcode coming from the Bus


Depending on whether opcode/(next µ addr) is 1 or 0



The data stored in the counter changes on a clock tick.


out addresses ROM.

Inside the ROM:


O D

E I

I C O L L L O W S

O L N O E D D D E E A

E D C N A A A S M M M B

P P P S C C B U A E E L

µ-addr cond opcode next C C C T C C R B R M M E

sel /addr addr

0 1 . 8 . . . . . . . . . . . .

goto fetch

1 1 . 10 . . . . . . . . . . . .

goto LDA

2 1 . 14 . . . . . . . . . . . .

goto ADD

3 1 . 18 . . . . . . . . . . . .

goto SUB

4 1 . 22 . . . . . . . . . . . .

goto STA

5 1 . 25 . . . . . . . . . . . .

goto JPZ

6 1 . 29 . . . . . . . . . . . .

goto CLR

7 1 . 31 . . . . . . . . . . . .

goto HLT

fetch 8 0 . 1 . . . . . . . 1 . . . mar=pc

9 1 1 . . 1 . . . . . . 1 . . pc++; goto Bus

lda 10 0 . . . . 1 . . 1 . . . . . abr=0

11 0 . 1 . 1 . . . . . 1 . . . mar=pc; pc++

12 0 . . . . . . . . . 1 1 . . mar=m[mar]

13 1 . 8 . . . . . 1 . . . 1 . . a=abr+m[mar]; goto fetch


O D

E I

I C O L L L O W S

O L N O E D D D E E A

E D C N A A A S M M M B

P P P S C C B U A E E L

µ-addr cond opcode next C C C T C C R B R M M E

sel /addr addr

add 14 0 . . . . . 1 . 1 . . . . . abr=a

15 0 . 1 . 1 . . . . . 1 . . . mar=pc; pc++

16 0 . . . . . . . . . 1 1 . . mar=m[mar]

17 1 . 8 . . . . . 1 . . . 1 . . a=abr+m[mar]; goto fetch

sub 18 0 . . . . . 1 . 1 . . . . . abr=a

19 0 . 1 . 1 . . . . . 1 . . . mar=pc; pc++

20 0 . . . . . . . . . 1 1 . . mar=m[mar]

21 1 . 8 . . . . . 1 . 1 . 1 . . a=abr-m[mar]; goto fetch

sta 22 0 . 1 . 1 . . . . . 1 . . . mar=pc; pc++

23 0 . . . . . . . . . 1 1 . . mar=m[mar]

24 1 . 8 . . . . 1 . . . . . 1 . m[mar]=a;goto fetch

jpz 25 0 . 1 . 1 . . . . . 1 . . . mar=pc; pc++

26 2 . 28 . . . . . . . . . . . .

if EQZ goto 28

27 1 . 8 . . . . . . . . . . . .

goto fetch

28 1 . 8 . 1 . . . . . . . 1 . . pc=m[mar];goto fetch

clr 29 0 . . . . 1 . . 1 . . . . . abr=0

30 1 . 8 . . . 1 . 1 . . . . . . a=abr+0;goto fetch

hlt 31 1 . 8 . . . . . . . . . . . 1 disable;goto fetch


Example - Instruction: LDA 100 at location 0.


µ-addr Condition opcode/ Next µ

Select (next addr) address

0 1 0 8

CS = 1 => LD is True; µ-PC will load data

op/n = 0 => Data will come from Next µ addr

Next µaddr = 8 => The µ-PC will be 8 next clock tick


8 0 0 0

LDMAR;OEPC => mar = pc (=0)

CS = 0 => µ-PC will inc to 9 on next clock tick


9 1 1 0

INCPC;OEMEM => pc =1; Bus = mem[0]; (Bus=LDA = 1)

CS = 1 => LD is True; µ-PC will load data

op/n = 1 => Data will come from Bus/opcode

Bus = 1 => µ-PC will be 1 on next clock tick


1 1 0 10

CS = 1 => LD is True; µ-PC will load data

op/n = 0 => Data will come from Next µ addr

Next µ addr = 10 => The µ-PC will be 10 next clock tick


10 0 0 0

LDABR;OECONST => Bus = 0; abr = Bus; (abr=0)

CS = 0 => µ-PC will inc to 11 on next clock tick


11 0 0 0

OEPC;INCPC;LDMAR => mar = pc (mar = 1); pc++; (pc = 2)

CS = 0 => µ-PC will inc to 12 on next clock tick


12 0 0 0

OEMEM;LDMAR => mar = m[mar] (mar = m[1] = 100)

CS = 0 => µ-PC will inc to 13 on next clock tick


13 1 0 8

OEMEM;LDACC => acc = abr + m[mar] (acc = 0 + m[100])

CS = 1 => LD is True; µ-PC will load data

op/n = 0 => Data will come from Next µ addr

Next µ addr = 8 => The µ-PC will be 8 next clock tick

This type of ROM organisation is called Horizontal Microprogramming.


In the pico-computer there are 32 µ-instructions and each instruction contains 12 control lines.


These numbers are manageable. But a processor with 200 control lines and 4096 µ-instructions would require ~1Mbit of ROM.


This ROM has to be very fast and so is expensive.


One way of reducing the size of ROM is to consider how many output bits are active at any one time.


In the pico-computer there are 12bits of output so in theory there could be 212 different combinations.


In practice the ROM consists of common combinations of outputs, indeed there are only ~13 different outputs.


We can reduce the size of the ROM by encoding these 13 different outputs as a 4bit number, and decoding this number to generate the correct outputs


This is called Vertical Microprogramming - 200 control lines may be encoded using only 6 bits:


Vertical Microprogramming


This considerably reduces the amount of ROM needed, but at a cost - the hardware for the decoding circuit is fixed and so we lose some of the benefits of being able to program at this level.


One solution to this is to replace the decoding circuit by yet another ROM - nano-ROM.


Use table lookup to generate the control lines



We again have complete control over this programming level.


We have saved on ROM – together both ROMS need only ~35Kbits.


µ-ROM and nano-ROM can be replaced without having to do any hardware alterations.



One drawback is that ROM now needs to be twice as fast - as we are now doing two table lookups instead of one.


159.233 Hardware 13 - 1