The Pico-computer has one addressing mode: Direct.

lda 100

jnz 4

Either the address is used directly for the jnz instruction, or the contents of the address are transferred between memory and the accumulator.

There are several different assembler syntaxes for addresses

The pico-computer uses the address (a number) on its own. Another way is to enclose the number in square brackets.

We need to consider what addressing modes we would like the computer to implement.

The contents of location 100 are added to the Accumulator

byte x; /*x happens to be at addr 100*/

a += x;

The value 100 is part of the instruction.

100 is added to the accumulator.

a += 100;

The operands of the instruction refer to specific registers.

The contents of register B are added to the accumulator

a += b;

The operands of the instruction refer to specific registers

int x = 2;

b = &x;

a += *b;

The operands of the instruction refer to specific registers

Register b contains a number.

The desired memory address is 10 plus the contents of b.

byte x[20]; /*x is at addr 10*/

b = 5;

a += x[b];

Add the contents of b and c, use the address so formed.

byte array[10];

b = array;

c = 5;

a += b[c];

Add the contents of b, c and 10, use the address so formed.

struct {

byte k;

byte j;

} s[5]; /*address of s is 10*/

/*b is set to i*sizeof(s)*/

/*c is set to offset of j within s*/

a += s[i].j;

byte x,*p; /*address of p is 100*/

p = &x;

a += *p;

The contents of b is an address.

Afterwards b is incremented.

This addressing mode can be used in the absence of any explicit stack instructions.

byte p[10];

b = p;

a += *b++;

Instruction Size.

Instructions can be

either variable in size – e.g. the Pico-computer or Pentium,

or of fixed length – e.g. the MIPS processor or PowerPC.

Variable size instructions -> a program will take up less space.

Fixed sized instructions -> the processor can be made simpler - freeing up space for more registers.

All instructions on the MIPs processor are 32 bits.

MIPS.

RISC machines trade simplicity of processor v Registers.

The MIPs processor has fixed size instructions - 32 bits.

There are 32 registers but -

register \$0 is reserved for the value 0

register \$31 is the PC.

The MIPS architecture supports 4 addressing modes:

• Register Indirect with Displacement Addressing:

• PC Relative

R type instructions:

ALU operations have three operands – all of them registers

Opcode rs rt rd shamt sub-fct

6 5 5 5 5 6 bits

add \$1,\$2,\$3 ;\$1 = \$2 + \$3

shamt is the shift amount

I type instructions:

Load/Store (the only instructions to access memory) and some branches

Opcode rs rt displ

6bits 5 5 16 bits

lw \$1,100(\$2) ;\$1 = mem[\$2+100]

J type instructions:

Jump and procedure call.

Opcode displ

6bits 26 bits

j 10000 ;goto 10000

add \$1,\$2,\$3 ;\$1 = \$2 + \$3;

sub \$1,\$2,\$3 ;\$1 = \$2 - \$3;

and \$1,\$2,\$3 ;\$1 = \$2 & \$3;

or \$1,\$2,\$3 ;\$1 = \$2 | \$3;

slt \$1,\$2,\$3 ;\$1 = (\$2 < \$3);

jr \$31 ;goto \$31;(return;)

lw \$1,100(\$2) ;\$1 = mem[\$2 + 100];

sw \$1,100(\$2) ;mem[\$2 + 100] = \$1;

beq \$1,\$2,100 ;if(\$1==\$2) goto PC+100

j 10000 ;goto 10000

jal 10000 ;\$31=PC+4;goto 10000;

;(function call;)

159.233 - Lecture 16 - 1